%infrastructure
%\subsection{System infrastructure}
%Our system comprises of a varying number of cores
Our simulations were carried out on a multicore system comprising primarily of Intel Ivybridge-like cores.
Table~\ref{tab:syspara} lists the system configuration that we ran for our default simulations


\begin{table}[ht!]\small
\centering
\begin{center}
\begin{tabular}{|c|c|} \hline
%Workload Type & \\
Processor & Ivybridge Microarchitecture 	\\ \hline
L1 Cache & 32 KB D/I, 8 way S.A \\ \hline
L2 Cache & 256 KB private Cache  \\ \hline
L3 Cache & 2MB/Core shared LLC, 16 way S.A \\ \hline 
DRAM & 4GB, DDR3-1600, 1 mem channel \\ \hline
% & per core; 4MB shared LLC 
% & L1 hit latency: 1 cycles; L2 hit latency: 8 cycles\\ \hline
%Memory & 4GB; DDR2-1600; 1 memory channel; \hline
\end{tabular}
\caption {Configuration of the evaluation platform.}
\label{tab:syspara}
\end{center}
\end{table}


\subsection{Architectural simulation setup and benchmarks}
We used the Sniper-5.0~\cite{sniper} system simulation tool for our performance simulations. 
This tool is integrated with McPAT-0.8~\cite{mcpat} which is used for power and area estimation.
For the purpose of obtaining thermal profiles, we created periodic traces using Sniper and created a power profile by running McPAT on each individual trace.
Our processor logic and wire models, described in Section~\ref{sec:technique} were used to obtain the corresponding TFET numbers from the CMOS core simulations.
These power profiles were then used as input to Hotspot3D for obtaining temperature variations across the processor.



